1. Field of the Invention
This invention relates to switched-mode power supplies and more specifically to magnetic amplifier regulated dcxe2x80x94dc converters.
2. Description of the Related Art
In switched-mode power converters, synchronous rectifiers sometimes replace conventional semiconductor diodes, particularly in power supplies with low-voltage outputs. Such synchronous rectifiers typically employ bipolar or field-effect transistors (FETs) because their forward voltage drop can be much less than that of a typical semiconductor diode.
In other power supplies, saturable core inductors are often used as xe2x80x9cmagnetic amplifiersxe2x80x9d or xe2x80x9cmag-ampsxe2x80x9d to provide individual regulation of each output voltage in a multi-output power converter. Magnetic amplifier circuits provide a means of independently regulating each output circuit over a limited range, thus allowing independent regulation of each output voltage at a reasonable cost.
U.S. Pat. No. 4,811,187 to Nakajima et al. (1989) discloses a dcxe2x80x94dc converter using a full wave bridge circuit with mag-amp output regulation. The disclosed circuit is shown (with some simplification) in FIG. 1. A secondary winding of Transformer T delivers an ac square wave voltage to rectifying diodes D1, D2 and D3 via saturable core inductors 10 and 12. The saturable core inductors 10 and 12 are reset by control circuit 14 to block current to D1 and D2 during a part of the square wave cycle, accomplishing output voltage regulation as discussed in that patent. A third rectifier, D3, is required to provide a path for the current in Lout during a portion of the cycle when saturable core inductors 10 and 12 are in a non-conducting state. D3 is commonly referred to as a xe2x80x9cfreewheelingxe2x80x9d diode, because it conducts current during a period when the current is xe2x80x9cfreewheelingxe2x80x9d (driven by inductance of Lout). The circuit of Nakajima is simple but suffers from losses due to the voltage drops of D1, D2 and D3.
Mag-amp regulation is rarely combined with synchronous rectifiers. U.S. Pat. No. 6,297,970, issued Oct. 2, 2001 to Hemena, et al. discloses a single ended, forward converter circuit for providing multiple output voltages from a single input voltage. The disclosed circuit does incorporate a saturable core inductor as a delay element in a half-wave rectification circuit. However, Hemena""s circuit relies on pulse width modulation of the input voltage to provide output voltage regulation. The mag-amp regulation added by Hemena serves to supply fine regulation of a secondary power output, but primary input regulation is still via pulse-width modulation of primary converter. This method requires fairly complex pulse generation and timing circuitry. Furthermore, a minimum load is required on the main output to keep secondary outputs in regulation.
The circuit of Hemena serves to provide zero voltage switching for the secondary-side switches over a limited range of load and supply variation. However, the circuit of Hemena does not provide zero voltage switching on the primary side. Thus, a significant source of power loss remains on the primary side.
In view of the above problems, the present invention includes both a circuit and a method.
The circuit of the invention is a regulated switching power supply circuit producing a regulated output voltage. The circuit includes: an inverter circuit that produces a substantially square-wave inverter voltage having two substantially equal half-cycles; at least two switching circuit branches, each having at least one saturable core inductor in series with a switching device having current switching terminals and a control terminal, said switching circuit branch coupled via a transformer to said inverter voltage; a magnetic amplifier control circuit which compares the output voltage to a voltage reference to produce an error signal, and which in response to the error signal provides variable reset current to said saturable core inductors to set the saturable core inductors to a current blocking state for a variable blocking interval during at least one of the half-cycles of said inverter voltage; and a freewheeling rectifier connected to provide a current path to bypass the saturable core inductors, the inverter circuit, and the active switching device during at least part of the blocking interval.
The invention also includes a method of producing a regulated dc voltage power output, which provides an output current. The method includes the steps of: Generating a substantially square-wave inverter voltage; Rectifying the inverter voltage by applying the inverter voltage to at least two switching devices while alternately activating one of the at least two switching devices during alternate half-cycles of the inverter voltage; delaying the application of the inverter voltage to the switching devices during a blocking interval by blocking current with a saturable core inductor; providing a freewheeling current path for the output current which bypasses the saturable core inductors, the inverter, and the switching devices during at least a portion of the blocking interval; and varying the duration of the blocking interval in response to an output voltage error signal, by feeding back reset current from an amplifier to the saturable core inductors to regulate output voltage, the reset current varying in direct relation with the error signal.
These and other features and advantages of the invention will be apparent to those skilled in the art from the following detailed description of preferred embodiments, taken together with the accompanying drawings, in which: